# stall cases
# test case s0
# mem_busy
0
# reg_write write
0
# reg_write reg
00000
# reg_write data
00000000000000000000000000000000
# pc_new
0000000000000000
# pc_old
0000000000000000
# pcsrc
0
# wb_op rd
00000
# wb_op write
0
# wb_op src
WBS_ALU
# aluresult
00000000000000000000000000000000
# memresult
00110100111000110110001000001010
# mem_out address
00000000000000
# mem_out rd
0
# mem_out wr
0
# mem_out byteena
1111
# mem_out wrdata
00000000000000000000000000000000
# exc_load
0
# exc_store
0

# test case s1
# mem_busy
0
# reg_write write
0
# reg_write reg
00000
# reg_write data
00000000000000000000000000000000
# pc_new
0000000000000000
# pc_old
0000000000000000
# pcsrc
0
# wb_op rd
00000
# wb_op write
0
# wb_op src
WBS_ALU
# aluresult
00000000000000000000000000000000
# memresult
10010111011001100100111101010100
# mem_out address
00000000000000
# mem_out rd
0
# mem_out wr
0
# mem_out byteena
1111
# mem_out wrdata
00000000000000000000000000000000
# exc_load
0
# exc_store
0

# test case s2
# mem_busy
1
# reg_write write
0
# reg_write reg
00000
# reg_write data
00000000000000000000000000000000
# pc_new
0000000000000000
# pc_old
0000000000000000
# pcsrc
0
# wb_op rd
00000
# wb_op write
0
# wb_op src
WBS_ALU
# aluresult
00000000000000000000000000000000
# memresult
00100001001110100000101100111101
# mem_out address
00000000000000
# mem_out rd
0
# mem_out wr
0
# mem_out byteena
1111
# mem_out wrdata
00000000000000000000000000000000
# exc_load
0
# exc_store
0

# flush cases
# test case f0
# mem_busy
1
# reg_write write
0
# reg_write reg
10000
# reg_write data
00000000000000000000000001111110
# pc_new
0100110101100101
# pc_old
0100010100001111
# pcsrc
0
# wb_op rd
00000
# wb_op write
0
# wb_op src
WBS_ALU
# aluresult
00010010000011010011100110101001
# memresult
00000000000000000000000001111110
# mem_out address
00111001101010
# mem_out rd
0
# mem_out wr
1
# mem_out byteena
0100
# mem_out wrdata
--------00011101----------------
# exc_load
0
# exc_store
0

# test case f1
# mem_busy
1
# reg_write write
1
# reg_write reg
11010
# reg_write data
00000000000000000100011000000000
# pc_new
1100011000111001
# pc_old
0100010111111100
# pcsrc
1
# wb_op rd
00000
# wb_op write
0
# wb_op src
WBS_ALU
# aluresult
00101001000111101101011011011001
# memresult
00000000000000000011000000101000
# mem_out address
11010110110110
# mem_out rd
0
# mem_out wr
0
# mem_out byteena
1100
# mem_out wrdata
1011101101000111----------------
# exc_load
1
# exc_store
0

# test case f2
# mem_busy
1
# reg_write write
0
# reg_write reg
00010
# reg_write data
00000000000000001001011111101010
# pc_new
0101000011101110
# pc_old
1001011111100110
# pcsrc
1
# wb_op rd
00000
# wb_op write
0
# wb_op src
WBS_ALU
# aluresult
00100010011111001101011000010110
# memresult
11111111111111111001100111101000
# mem_out address
11010110000101
# mem_out rd
1
# mem_out wr
0
# mem_out byteena
0011
# mem_out wrdata
----------------0011010010011011
# exc_load
0
# exc_store
0
